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IIT Roorkee Project Positions (SRF) Recruitment 2026: 01 Vacancy for AI Inference Chip Project
Important Dates
Published
Apr. 13, 2026
Starts
Apr. 13, 2026
Deadline
Apr. 23, 2026
Exam Date
Apr. 24, 2026
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Job Analysis
AI-generated insights
Best-Fit Profile
This role is ideal for highly specialized B.E/B.Tech (ECE) graduates with a mandatory GATE qualification and at least 5 years of experience in semiconductor device physics, network theory, and VLSI circuit design. Candidates with hands-on experience in EDA tools (Cadence, Spice, TCAD), HDL (Verilog/Verilog-A), and scripting (Python, Perl, Bash) who are enthusiastic about cutting-edge research in AI inference chips will find this opportunity particularly rewarding.
Important Considerations
Individuals lacking the mandatory GATE qualification or the minimum 5 years of relevant experience should not apply. Those without a strong background in VLSI circuit design, semiconductor device physics, or proficiency in the specified EDA tools and languages will not be suitable for this highly technical and specialized project. The short, contractual duration of six months might also be a dealbreaker for those seeking long-term permanent employment.
Career Impact
Working as a Senior Research Fellow at IIT Roorkee, a globally recognized premier institution, offers significant prestige and a valuable addition to one's research portfolio. This project involves advanced research on AI inference chips, providing excellent exposure to cutting-edge technology and a strong foundation for future careers in R&D, academia, or specialized industry roles, despite its initial short-term contractual nature. It's an opportunity to contribute to significant technological advancements within a top-tier academic environment.
Note: This is a helpful, AI-generated overview designed to save you time. Always refer to the official PDF notification for complete and final details.
About Indian Institute of Technology Roorkee
Job Posts
Eligibility Criteria
Educational Qualification
- Essential: B.E/B.Tech in Electronics & Communication Engineering (ECE) or an equivalent qualification.
- Mandatory: Must possess a valid GATE qualification.
- Experience: 5 years of relevant experience.
- Desired Skills: Candidates should have strong knowledge in semiconductor device physics, network theory, and VLSI circuit design. Exposure to CMOS design logic, EDA tools (Cadence, Spice, Layout-Editors, TCAD simulation), Hardware Descriptive Languages (Verilog/Verilog-A), and scripting languages (Python, Perl, Bash) is highly desirable.
Salary & Pay Scale
Selected candidates will receive emoluments of Rs. 42,000/- per month, in addition to House Rent Allowance (HRA) as per the institute's prevailing rules.
Vacancy Breakdown (Category-wise)
- Project Position (SRF)01
How to Apply
Candidates interested in the Project Position (SRF) must follow these steps:
- Application Submission: Submit your application to the office of the Principal Investigator (Prof. Anand Bulusu) via email to [email protected] before the interview date.
- Required Documents for Email Submission:
- Application on plain paper.
- Detailed Curriculum Vitae (CV) including chronological details of degrees/certificates obtained.
- Details of relevant experience, including research and industrial work.
- Attested copies of all degree/certificate and experience certificates.
- Walk-in Interview: An offline walk-in interview will be held on April 24, 2026, at 2:30 PM.
- Interview Venue: Department of ECE, HOD Conference Room, IIT Roorkee.
- Documents for Interview: Candidates must bring all original degree(s)/certificate(s) and experience certificate(s) for verification at the time of the interview.
- Note: No TA/DA will be admissible for attending the interview. Preference will be given to SC/ST candidates with equal qualifications and experience.
Application Fee
No application fee details are mentioned in the notification.
Official Links
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Similar B.Tech Opportunities
Job Analysis
AI-generated insights
Best-Fit Profile
This role is ideal for highly specialized B.E/B.Tech (ECE) graduates with a mandatory GATE qualification and at least 5 years of experience in semiconductor device physics, network theory, and VLSI circuit design. Candidates with hands-on experience in EDA tools (Cadence, Spice, TCAD), HDL (Verilog/Verilog-A), and scripting (Python, Perl, Bash) who are enthusiastic about cutting-edge research in AI inference chips will find this opportunity particularly rewarding.
Important Considerations
Individuals lacking the mandatory GATE qualification or the minimum 5 years of relevant experience should not apply. Those without a strong background in VLSI circuit design, semiconductor device physics, or proficiency in the specified EDA tools and languages will not be suitable for this highly technical and specialized project. The short, contractual duration of six months might also be a dealbreaker for those seeking long-term permanent employment.
Career Impact
Working as a Senior Research Fellow at IIT Roorkee, a globally recognized premier institution, offers significant prestige and a valuable addition to one's research portfolio. This project involves advanced research on AI inference chips, providing excellent exposure to cutting-edge technology and a strong foundation for future careers in R&D, academia, or specialized industry roles, despite its initial short-term contractual nature. It's an opportunity to contribute to significant technological advancements within a top-tier academic environment.
Note: This is a helpful, AI-generated overview designed to save you time. Always refer to the official PDF notification for complete and final details.
Official Links
Prepare Your Application Documents
🔒 100% Secure & In-Browser: Filling out the application form? Use these free utilities to easily format and compress your uploads. All tools process files locally in your browser—nothing is ever uploaded to our servers.
Smart Image Resizer
Compress photo/signature to exact KB limits (e.g. 20-50KB) for SSC, UPSC.
Passport Photo Maker
Crop and tile photos into printable A4 or 4x6 sheet grids.
Signature Extractor
Remove gray shadows & shadows from signature photos.
Image to PDF Combiner
Merge multiple marksheets/certificates into a single lightweight PDF.
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