• Essential Qualification: First Class B.E. / B.Tech in Electronics & Communication Engineering (ECE) from a recognized University/Institute, AND M.E. / M.Tech / M.S. in VLSI Design / Embedded Systems / Microprocessors or related VLSI specialization.
• Desirable Skills: Strong knowledge of Verilog / SystemVerilog RTL coding, digital VLSI design, ASIC design flow (synthesis, STA, physical design, RTL-to-GDSII), C/C++, Python, RISC-V architecture, AI/ML lightweight neural networks, quantization, edge-AI accelerators, FPGA prototyping, and chip testing.
• PhD Option: Selected JRF will be eligible to register for PhD / MS-PhD Programme at NIT Tiruchirappalli as per institute norms.
NIT Tiruchirappalli JRF Recruitment 2026
Quick Recruitment Snapshot
Key recruitment parameters at a glance before you apply
Crucial Recruitment Dates
Official schedule & key deadlines
Published
Aug 24, 2026
Starts
Aug 24, 2026
Deadline
Sep 28, 2026
Exam Date
TBA
Eligibility Criteria & Educational Qualifications
Who is eligible to apply for this recruitment? Check essential educational qualifications, branch/stream criteria, and age limits.
Educational Qualification
Age Limit & Relaxations
Upper age limit is 35 years as on the application closing date (28-09-2026). Age relaxation of 3 years for OBC candidates and 5 years for SC/ST candidates is admissible as per Government of India guidelines.
Selection Procedure & Screening Stages
Verified Official SourceMulti-stage interview and rubric-based evaluation procedure.
Email Application & Profile Scrutiny
Technical Interview (Online / In-person)
Document Verification
Applications received via email will be scrutinized by the Screening Committee based on essential academic qualifications, VLSI/ASIC expertise, GATE/NET score, and research aptitude. Shortlisted candidates will be invited for an Interview (communicated via email). The selected candidate will be permitted to register for the Ph.D. programme at NIT Tiruchirappalli as per institute rules.
Selection Criteria & Marking Scheme
Verified Official SourceOfficial weightage breakdown, qualification scoring, and interview evaluation criteria.
| Evaluation Component | Max Marks / Weightage |
|---|---|
| Academic Record in B.Tech & M.Tech (ECE / VLSI Design) | 30 Marks |
| Domain Expertise in Verilog RTL, ASIC Flow, RISC-V & Edge-AI | 30 Marks |
| Hands-on VLSI Tools, FPGA Prototyping & Research Publications / GATE Score | 20 Marks |
| Technical Interview & Research Problem Solving Presentation | 20 Marks |
Aspirant Ground Reality & Career Trajectory
Verified Official SourcePractical service rules, posting locations, transfer policy, and promotion ladder curated from official gazettes.
Work Culture & Environment
Office/fieldwork balance, duties, organizational environment.
Posting & Transfer Policy
Initial posting criteria, zone preferences, transfer liability.
Career & Promotion Ladder
Promotion timeline, seniority ladder, pay grade scaling.
Avoid common application rejection triggers, photo/signature guidelines, and certificate validity windows.
- Prescribed Application Format Mandatory: Applications must be submitted strictly in the official template format appended to the advertisement; plain text resumes or unformatted CVs will be summarily rejected.
- Email Application Only: Scanned copy of filled application along with self-attested certificates must be emailed to [email protected] with subject 'JRF Application-CSoCDF PROJECT' by 28-09-2026, 5:00 PM.
- Ph.D. Registration Opportunity: Selected candidate is eligible to convert/register into the prestigious Ph.D. program at NIT Trichy subject to departmental evaluation.
- Age Limit Calculation: Upper age limit is 35 years as on the closing date (28-09-2026), with relaxations of 3 years for OBC and 5 years for SC/ST candidates.
- Interview Communication: Shortlisted candidates will be notified exclusively via email; candidates must present original documents at the time of interview.
Category-Wise Vacancy Breakdown & Pay Scale
Detailed post distribution across UR, OBC, EWS, SC, ST quotas and 7th CPC Pay Matrix / Monthly Stipend.
Category-Wise Vacancy Distribution
- Unreserved / Open (UR)1
Pay Scale & Monthly Remuneration
Fixed consolidated monthly fellowship of ₹37,000/- for a duration of 36 months (3 years), with extension subject to annual performance evaluation.
Consolidated fellowship of ₹37,000/- per month for 3 years (36 months, subject to annual performance review).
How to Apply Online Step-by-Step?
Follow this verified step-by-step application procedure on the official recruitment portal.
Application Procedure
- Download the prescribed JRF application form template appended to the official advertisement notification (ADVT_JRF_ECE_SEP_2026_v3.pdf).
- Fill in all details accurately including academic career (Class 10th to Post-Graduation), GATE/NET scores (if any), research publications, work experience, and references.
- Affix a recent passport size colour photograph and sign the declaration.
- Assemble self-attested photocopies of educational certificates, mark sheets/grade cards, experience letters, and category certificates into a single consolidated PDF document.
- Email the scanned application form and supporting documents to [email protected] with the subject line “JRF Application-CSoCDF PROJECT” on or before 28-09-2026, 5:00 PM.
Application Fee & Category Concessions
No application fee is required.
Official Notification & Portal Verification
Direct links to the authorized government portal, official notification PDF, and career portal.
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Prepare Your Application Documents
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Image to PDF Combiner
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Similar M.Tech Opportunities
Jobs by Qualifications & States
Crucial Recruitment Dates
Official schedule & key deadlines
Published
Aug 24, 2026
Starts
Aug 24, 2026
Deadline
Sep 28, 2026
Exam Date
TBA
Latest from National Institute of Technology, Tiruchirappalli
Selection Procedure & Screening Stages
Verified Official SourceMulti-stage interview and rubric-based evaluation procedure.
Email Application & Profile Scrutiny
Technical Interview (Online / In-person)
Document Verification
Applications received via email will be scrutinized by the Screening Committee based on essential academic qualifications, VLSI/ASIC expertise, GATE/NET score, and research aptitude. Shortlisted candidates will be invited for an Interview (communicated via email). The selected candidate will be permitted to register for the Ph.D. programme at NIT Tiruchirappalli as per institute rules.
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Candidates must have a First Class B.E./B.Tech in Electronics & Communication Engineering (ECE) and an M.E./M.Tech/M.S. in VLSI Design, Embedded Systems, Microprocessors, or related VLSI specializations.
Sarkari Job Khojo is an independent information service and job discovery platform. All recruitment insights, syllabi, previous year exam cutoffs, and selection stages are compiled from official government notifications, gazettes, and recruitment portals. We are not affiliated with, authorized by, or an official representative of any government agency or recruitment board. Always verify details in the official advertisement PDF before applying.